The invention is based on a priority application EP 02360166.9 which is hereby incorporated by reference. The invention relates to a circuit arrangement for an LVDS driver (LVDS=Low Voltage Differential Signal) which uses combined bipolar and MOSFET technology with at least two MOSFETs.
LVDS drivers (LVDS=Low Voltage Differential Signal) are used for the transfer of data on symmetrical lines.
An LVDS driver in CMOS technology is known from DE 199 22 354 A1. Its speed is regarded, for speeds which will soon be required of approximately 1 Gbit/s, as too low. Moreover, the known arrangement needs a positive supply voltage of 2.5 volts or higher and this voltage is far higher than the output voltage level of 1.2 volts provided in the standard specification for LVDS drivers. Because of the high operational voltage a higher power loss results. The known circuit also needs a simulation arrangement for automatic control purposes.
The object of the invention is to cite an LVDS driver circuit in integrated semi-conductor technology, which enables an increase in the data rate compared with the prior art.
This object is achieved according to the invention in that a multiplier circuit is connected to an output stage of the LVDS driver and the multiplier circuit is controlled by means of an automatic control circuit, which generates control signals for controlling a current source of the multiplier circuit and for controlling the amplification factor of differential input signals of the multiplier circuit.
Advantages of the invention are that it enables said technology, in which semi-conductor components are used in bipolar techniques (e.g. NPN and/or PNP transistors) (as well as MOS technology), to take advantage of the high speed of the bipolar elements in comparison to MOS elements, if, as provided in the embodiment example, those parts of the LVDS driver which require high circuit speeds are carried out in bipolar techniques. MOS techniques are used, on the other hand, where this is advantageous for reasons of a high input resistance. Advantageously MOSFETs of equal polarity can be provided in embodiments of the invention.
It can be advantageous according to one embodiment of the invention to provide MOSFETs of different polarity (in other words at least one N channel MOSFET and at least one P channel MOSFET). The integrated circuit produced using MOSFETs of this kind together with bipolar elements is a case of BICMOS technology. This too has the advantages mentioned of high speed of the bipolar elements and the possibility created by the MOSFETs of low-power drive.
In embodiments only a small voltage of approximately 1.8 volts is required for the LVDS driver as positive supply voltage, taking into account the above-mentioned output voltage level. In order to be able to use components of the circuit arrangement which need a higher voltage or have to operate in the range of negative voltages (in respect of earth), in embodiments of the invention the arrangement is made in such a way that, in addition to the positive supply voltage for operation mentioned, a negative supply voltage (in the example larger than the positive supply voltage) is to be supplied. The arrangement according to the embodiment example additionally has at least one circuit point which is to be connected to an earth potential, compared with which the positive supply voltage and negative supply voltage mentioned are measured. One advantage is that the output stage or power stage of the LVDS driver, which, compared with other components of the circuit, has to provide a relatively high current to feed a relatively low impedance consumer, namely a receiver for the output signals of the LVDS driver, owing to the small supply voltage has only a low power consumption. By contrast, the other components of the circuit operate in the embodiment example with considerably smaller currents, so a higher operational voltage there does not lead to an undesired increase in the overall power of the LVDS driver.
In the embodiment of the invention according to claim 4 it is of advantage that the changes in the amplification factor of the multiplier can be performed easily and with low power and the circuit driving it is hardly loaded. In the multiplier, which in the embodiment example is constructed in a known way from six transistors, the basic connections (or more generally) control connections of two of the six transistors are applied to a controllable voltage and the basic connections of two other transistors are applied to a fixed voltage. In this way the amplification factor and thus the multiplication factor can be changed. The input signals to be amplified are in the embodiment example supplied to the emitters of the transistors mentioned and the output signal, which in the embodiment example is supplied to an output stage, appears on the collectors.
In one embodiment of the invention it is provided that the current source is provided for changing the offset of the output voltage of the LVDS driver. In the embodiment example here too the drive takes place via a MOSFET, which drives a further transistor controlling the current of the current source. This MOSFET is embodied in the example in a complementary technology for comparing said MOSFET for automatic control of amplification.